NEC and Tohoku University co-develop new "zero standby power" Spintronics logic ICs

Tohoku University and NEC developed new "zero standby power" Spintronics logic ICs. They actually developed a library that establishes automatic design flow of nonvolatile logic-in-memory integrated circuits. Using this library they managed to design and make a prototype image processing chip that reduces "unnecessary power consumption" by up to 75%.

This new chip uses 25 processors, but by running only the needed processors for each operation and turning off the power for the unused ones, the power consumption is reduced. NEC says that the new library can be used in addition to existing design tools and will enable large-scale logic-in memory integrated circuits, even without expertise in circuit design or Spintronics technology.




Tohoku University and NEC are still working together to further improve their Spintronics logic IC technology in order to develop larger-scale and more power-efficient integrated circuits for a wide range of uses as well as to pursue the early commercial development of the technology.

NE and Tohoku have been working together on Spintronics technology for quite some time. Back in 2011 it was reported that they have developed Spin-CAM: an MRAM based CAM (content addressable memory) that includes non-volatile storage by using the vertical magnetization of vertical domain wall elements in a cobalt-nickel active layer.

Source: NEC


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